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    Latency Numbers Reference

    Essential latency numbers every programmer should know (2024 edition)

    System Latencies

    From CPU cache to network round trips - ordered by latency

    All Operations
    CPU & Cache
    Memory
    Storage
    Network
    L1 cache reference
    Accessing data from L1 cache
    0.5 ns
    Base reference
    Branch mispredict
    CPU branch prediction failure
    5 ns
    10x L1 cache
    L2 cache reference
    Accessing data from L2 cache
    7 ns
    14x L1 cache
    Mutex lock/unlock
    Thread synchronization
    25 ns
    50x L1 cache
    Main memory reference
    Accessing RAM
    100 ns
    200x L1 cache
    Compress 1KB (Zippy)
    Compress 1KB with Snappy
    3.0 μs
    6,000x L1 cache
    Send 1KB over 1 Gbps network
    Network transfer time
    10.0 μs
    20,000x L1 cache
    Read 4KB randomly from SSD
    SSD random read
    150.0 μs
    300,000x L1 cache
    Read 1MB sequentially from memory
    Sequential RAM read
    250.0 μs
    500,000x L1 cache
    Round trip within same datacenter
    Network round trip in DC
    500.0 μs
    1,000,000x L1 cache
    Read 1MB sequentially from SSD
    SSD sequential read
    1 ms
    2,000,000x L1 cache
    Disk seek (HDD)
    HDD seek time
    10 ms
    20,000,000x L1 cache
    Read 1MB sequentially from disk
    HDD sequential read
    20 ms
    40,000,000x L1 cache
    Send packet CA -> Netherlands -> CA
    Intercontinental round trip
    150 ms
    300,000,000x L1 cache